How to get a precise vdd/2 voltage?

[277897909]

vdd/2 faq vdd

Hi,
I've read a topic about vdd/2 bias generator.But in my case I need a bias voltage follows the vdd/2,even if vdd fluctuates.

I am considering resistor divider,but the matching and area of resistors seem painful.
What about doide connected N/P mos divider?Is there anything to concern?

Thanks & Regards!

 

[angel_oax]

do you need that Vdd/2 to supply a cmos amplifier?

 

[rfsystem]

You could use only MOS devices will isolated bulk connection. For most processes this is only a PMOS connected as diode. The NMOS will have a strong substrate effect violating the equal voltage principle. Isolated NMOS also work but require an double WELL process.

You should consider that iff VDD is varying over time the frequency response from VDD to VDD/2 is not flat. Then you should have equal load capacitance to VDD and VSS from VDD/2.

 

[lovexxnu]

rfsystem's reply is great

Added after 52 minutes:

rfsystem's reply is great

 

[Humungus]

Diode connected transistors give in general worse matching than resistors, as it is the delta(Vgs) which determines the accuracy of the output voltage.

If a small current is allowed, placing two diode-connected PMOS in series needs very big transistors lengths.

I think that reisistors give better matching for a given area constraint.

 

[layoutmaster]

I agree with Humungus, even when you say that resistors matching seem painful, it'll be the more efficient solution.

To get a good matching with the transistors would be more difficult that make a good enough job with the resistors, at least it's ALWAYS like that...

 

[rfsystem]

NOP!

Depends on process. If you have no High Ohmic Poly, no Silicide Block Layer what remains!

N+ Diffusion
P+ Diffusion

Both Voltage depended

NWELL

also substrate voltage dependend

If you are sitting at a 0.18u SiGeBiCMOS 40 layer process but what if your choice is only a 0.13u CMOS w/o anything add-analog?

 

[layoutmaster]

okay. That's correct.

I was talking "in general".... Always it would be process dependent so it might be a good starting point... to define which kind of process are we talking about and, from there, the best answer will arise...

 

[jecyhale]

You can use two PMOS (diode connected and connect the source with sub together) if you use a N-well process.
I think it will be well matched.