Zarrin
Junior Member level 3
Dear all,
I need to feed a sample circuit with a number of random inputs (say for example 1000 input patterns) and then obtain a power trace (power consumed by the circuit during applying the input patterns). As the test circuit may not be small or the number of input patterns may be high, i don't want to use Hspice as it may take a long time. So I want to use Synopsys design compiler or SoC encounter tools to do this. I think such work is possible in both tools but i don't know how to do it. Please some help me. Thanks.
I need to feed a sample circuit with a number of random inputs (say for example 1000 input patterns) and then obtain a power trace (power consumed by the circuit during applying the input patterns). As the test circuit may not be small or the number of input patterns may be high, i don't want to use Hspice as it may take a long time. So I want to use Synopsys design compiler or SoC encounter tools to do this. I think such work is possible in both tools but i don't know how to do it. Please some help me. Thanks.