Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to establish a CMOS inverter power consumption?

Status
Not open for further replies.

mohazaga

Full Member level 2
Joined
Aug 18, 2005
Messages
141
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Activity points
2,397
CMOS power consumption

Hi ,
I want to find out the power dissipated by CMOS inverter , I use OrCAD Pspice 9.2 . So , just ploting the sum of power disspated by the two transistor Vs the time (transite analysis) is the true way to find the power disspated by the gate.

But , their are spick at transtion fro HL/LH at output signal of inverter gate.
attached the CKT , any help
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top