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how to edit veriloga code for adc dnl and inl test?

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Hello,everyone!
Now I know we can use the veriloga code for adc dnl and inl simulation in cadence spectre,but how to edit the veriloga code? who can help me?
my adc is 8bit 12.5Msps 1.8vpp,
 

you can check the function hdl library which is provided by cadence. this library has the sample code for a 8-bit adc and its inll and dnl test code. for the using of ahdl or vhdl-a you can check the online manual
 

The library name is ahdlLib. It is in the cadence data base. It is easy for you to find it. there are many verilog-A model for you
 

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