How to do layout for resistor and capacitor using Virtuoso?

[zahrein]

Help on Virtuoso Layout?

Guyz, i need help on how to do a layout for resistor and capacitor using virtuoso layout?
How is the design rule ?
How is the calculation?. Thank you.

 

[Hughes]

Help on Virtuoso Layout?

The design rule is provided by the foundry. The caculation is:
R = Rs * (W/L)
Rs is the sheet resistance.
C = C0 * W * L
C0 is the unit capacitance ( F/um²)

 

[Analog_starter]

Re: Help on Virtuoso Layout?

You must follow the layout design rule.

 

[lakeoffire]

Help on Virtuoso Layout?

You need to find out what kind of resistors/capacitors are available in your process, and then choose one based on the trade-offs such as device size, values, accuracy, etc.

 

[jianbinma]

Help on Virtuoso Layout?

The design rule is provided by the foundry. The caculation is:
R = Rs * (W/L)
Rs is the sheet resistance.
C = C0 * W * L
C0 is the unit capacitance ( F/um²)


It's right, but there are some different resistor structures,for example ,there are poly resistor ,active resistor ,metal resistor,n-well resistor and so on.The same to capacitor.It's different in different foundries.

 

[ulcer]

Help on Virtuoso Layout?

You should follow the design rule, I think it must be very clear in the rule files that how to lay out r & c.

And sometimes, the dummy resistors and capacitors are nessencery.

 

[zahrein]

Help on Virtuoso Layout?

ive got wat u all said.

Usually when i use cadence virtuoso layout, i just take the resistor from the instance. From there, i will change the value of the resistor by clicking the properties.

If i wanna design the resistor manually , i must know the value of Rs (sheet resistance). Where can i get the value of sheet resistance from the Cadence virtuoso layout?

 

[Hughes]

Help on Virtuoso Layout?

You don't get sheet resistance from the Cadence. You get it from foundry. Then you use it for layout parameter extraction rules.