stsiligg
Newbie level 5
I want to callibrate a pll(74HC4046AN) as part of an mfsk demodulator for my diploma thesis.
17 different frequencies which correspond to 17 different analog voltages get in the phase
comparator. The pll have to lock each time at different frequency. I have tryed any
combination for RC filter but the best result is as shown at this picture(obrazki.elektroda.pl/14_1159529006.JPG).
Is there any way to have a better signal? Any help?
17 different frequencies which correspond to 17 different analog voltages get in the phase
comparator. The pll have to lock each time at different frequency. I have tryed any
combination for RC filter but the best result is as shown at this picture(obrazki.elektroda.pl/14_1159529006.JPG).
Is there any way to have a better signal? Any help?