Improving lock time in PLL

[mohamis288]

How to improve lock time in PLL, without affecting spurs and phase noises too much? For example, I can improve lock time by doubling bandwidth, but it deteriorate phase noises and spurs. What can I do as an alternative?

 

[betwixt]

The classic method is to use a timer to momentarily reduce the time constant when it goes out of lock but it depends on whether you are tracking a signal or synthesizing a frequency as to how the lock detection is applied.

Brian.