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How to display values of multi-dimensional array in VCS?

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yuenkit

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mda reg vcs

Hi,

I wish to observe to changes of multi-dimension array (e.g. memory) in VCS . How to do that?

I know Aldec and Modelsim can shows the value of those array real-time, but I cann't find the way with VCS.

Thanks.
 

aji_vlsi

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ucli commands

yuenkit said:
Hi,

I wish to observe to changes of multi-dimension array (e.g. memory) in VCS . How to do that?

I know Aldec and Modelsim can shows the value of those array real-time, but I cann't find the way with VCS.

Thanks.
Hi,
Which VCS Version do you use? I use some of the latest ones, and they can do this. Assuming you are doing an interactive mode:

vcs -debug -f flist
simv -gui

While dumping, make sure you add -aggregates switch to have memories dumped. Then their mem view is very useful and does update in real time.

HTH
Ajeetha
www.noveldv.com
 

yuenkit

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multi-dimensional vcs

While dumping, make sure you add -aggregates switch to have memories dumped. Then their mem view is very useful and does update in real time.

Where do we insert the -aggregates option? in the testbench or command line?
 

AlexWan

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viewing multi dimensional arrays in synopsys dve

In verilog:

// ************************************************
// Dump the contents of the memory to a file called
// dwmm_sram.dump in Verilog format
// ************************************************
low_addr = 'h0000;
high_addr = 'h7fff;
mem_dump(1, low_addr, high_addr, "dwmm_sram.dump", 1, status);
 

aji_vlsi

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vcs ucli gui dve

yuenkit said:
While dumping, make sure you add -aggregates switch to have memories dumped. Then their mem view is very useful and does update in real time.

Where do we insert the -aggregates option? in the testbench or command line?
Hi,
Not sure how you usually dump, here is one way:

vcs -debug -f flist
./simv -ucli -do dump.tcl

-- dump.tcl ----
dump -aggregates -add /
run
exit
-----

dve -vpd vcdplus.vpd &

Of-course there are few other ways (interactive, $vcdplus calls etc.) - read their documentation or elaborate on how you do it and seek for assistance.

HTH
Ajeetha
www.noveldv.com

Added after 1 minutes:

AlexWan said:
In verilog:

// ************************************************
// Dump the contents of the memory to a file called
// dwmm_sram.dump in Verilog format
// ************************************************
low_addr = 'h0000;
high_addr = 'h7fff;
mem_dump(1, low_addr, high_addr, "dwmm_sram.dump", 1, status);

Hi,
What's mem_dump here - some custom task/function? Sounds similar to writemem/readmem stuff - they won't help in viewing it in Waveform etc.

Regards
Ajeetha
www.noveldv.com
 

yuenkit

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yes it works, Thanks Alji_vlsi!

I have checked the UCLI user guide, and found the examples.

Few things i want to point out is that, according to the user guide,
The -aggregates option is for VHDL, not for verilog.

and after -add , we must supply the scope or the module name.

However, according to the user guide, it says that, dump is not supported in NTB.
So, what if I want to run it using Native Testbench? Any solution?

Thanks
 

aji_vlsi

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synopsys vcs ucli

yuenkit said:
yes it works, Thanks Alji_vlsi!

I have checked the UCLI user guide, and found the examples.

I'm glad that I was able to help.

Few things i want to point out is that, according to the user guide,
The -aggregates option is for VHDL, not for verilog.
Best would be to file a report to vcs_support@synopsys.com - if you feel it is important.

and after -add , we must supply the scope or the module name.

However, according to the user guide, it says that, dump is not supported in NTB.
So, what if I want to run it using Native Testbench? Any solution?

Thanks

AFAIK, NTB variables can't be dumped *today* in released versions (I've NDA that prevents me from telling more), however your design is still dumped - so no big deal. BTW, we (Ben Cohen, myself and Srinivasan) are working on a VMM paper for SNUG06 and found a nice work-around for this limitation - just add a debug SV-if (or Vera port/interface), update all your NTB var to IF signals - and there you go!

HTH
Ajeetha
www.noveldv.com
 

yuenkit

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how to view arrays in dve from synopsys

To be honest, I have sent solvnet questions regarding this, but their response is much slower than this forum, and their answer doesn't hit to the point.

Their answer was: "dumped the variable, and use vcs -gui to view it", which doesnt help anything.

I want to ask another question. when i want to display MDA (multi-dimensional array), i have to dump it at first. Can I just do it without dumping the result? Which means, I use DVE to open my testbench, and I can view the MDA from the waveform. I do not have to create VPD.

I have noticed that, after I dumped the file using the UCLI command, a new type of signal called MDA is shown. But if I didn't run the UCLI command, this type of signal doesn't appear.
 

aji_vlsi

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vc debugger 2 dimension array

Hi,
Let me know your VCS version to assist better.

More replies below..

yuenkit said:
To be honest, I have sent solvnet questions regarding this, but their response is much slower than this forum, and their answer doesn't hit to the point.

I have not used Solvnet but vcs_support@syn.. is quite useful as I found.

I want to ask another question. when i want to display MDA (multi-dimensional array), i have to dump it at first. Can I just do it without dumping the result? Which means, I use DVE to open my testbench, and I can view the MDA from the waveform. I do not have to create VPD.

I think what you are looking for is an INTERACTIVE Mode debug - try this flow:

1. vcs -debug -f flist
2. simv -gui
3. Select Hier of interest, right click, Select "Add Dump", check "Aggregates" dialog box
4. Run sim, go to hier of interest and Data pane should show the MDAs in design.
5. You can drang-n-drop etc. to Waveform/list/mem view etc.

Let me know if this is what you needed.

I have noticed that, after I dumped the file using the UCLI command, a new type of signal called MDA is shown. But if I didn't run the UCLI command, this type of signal doesn't appear.

Looks to me like you are using a Post process flow. Please clarify as to what exactly you need.

Regards
Ajeetha
www.noveldv.com
 

yuenkit

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how to dump multi-dimensional arrays with vpd

I am using vcs2005.06. Not the vcs2005.06-SP1

Actually I am trying to explore the posibility of displaying MDA in Interactive Mode and Post Processiong Mode.

for PP mode, thanks to you, I manage to get it.

But for Interactive mode, after I Add Dump, checked the aggregates option, Deth to all, the MDA still doesn't show up in Data pane.

Is that because I am not using SP1?
 

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display an array + verilog

yuenkit said:
I am using vcs2005.06. Not the vcs2005.06-SP1

Actually I am trying to explore the posibility of displaying MDA in Interactive Mode and Post Processiong Mode.

for PP mode, thanks to you, I manage to get it.

But for Interactive mode, after I Add Dump, checked the aggregates option, Deth to all, the MDA still doesn't show up in Data pane.

Is that because I am not using SP1?
I suggest that you contact vcs_support@synopsys.com (and if you like, mark a CC to: gmail.com@ajeetha, I will fwd to one who works currently @ SNPS).

My guess is that you have populated your D-Pane BEFORE you did this Add Dump --> -aggregates.

Good Luck!
Ajeetha
www.noveldv.com
 

    yuenkit

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yuenkit

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dumping two dimensional array verilog

Aji,

I manage to get it! I jst realized that i missed one step: after add Dump, I have to click on the menu: Simulator > Start. Then only the data pane will be updated.

previously aft i add dump, i type: "run 10" to check. run the simulation in this way won't update the data pane.

Thanks once again to Aji.
 

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