Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to design this BUFFER ckt.

Status
Not open for further replies.

engrvip

Full Member level 2
Full Member level 2
Joined
May 3, 2006
Messages
142
Helped
3
Reputation
6
Reaction score
0
Trophy points
1,296
Visit site
Activity points
2,377
How to source foll. BUFFER ckt. for CMOS CFA

I am in process of designing a CMOS CFA ( current feedback amplifier ). And this is one of the buffer ckt architectures I have found from technical papers by C. Toumazou.

But I am not able to DC bias this ckt to provide sufficient operating current. Can somebody explain its functioning and sizing (W/L) procedure ?

Thanks
Vipul
 

Sorry for not attaching the image earlier....but now I have attached it in this thread.

This is the source follower ckt. used as voltage buffer in CFA ( current feedback amplifier) ?
I want to understand its functionality and also how much offset in voltage it will give at the output?
 

Attachments

  • source foll.JPG
    source foll.JPG
    18.5 KB · Views: 114

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top