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How to design CML(Current Mode Logic) type RS-latch!!!!

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EHY

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Can anyone describe me how to design CML type RS-latch??
 

erikl

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Here's the schematic of an ECL-Master-Slave-FlipFlop: ECL-MS-FF.png

You can use the D inputs as R/S inputs. Probably the Master part (Q1 .. Q7) is enough for your purpose.
 

EHY

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Here's the schematic of an ECL-Master-Slave-FlipFlop: View attachment 116180

You can use the D inputs as R/S inputs. Probably the Master part (Q1 .. Q7) is enough for your purpose.

I don't need CLK

I want same operation just like RS-latch composed of NOR gates.

so, How can i design it using CMOS?
 

erikl

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Re: How to design CML(Current Mode Logic) type RS-latch

I don't need CLK

I want same operation just like RS-latch composed of NOR gates.

so, How can i design it using CMOS?
As I told you above, just use the Master part of the ECL version.

  • Leave the clock circuit away
  • Replace the BJTs by nMOSFETs
  • ... and that's it:
View attachment NOR-RS-CML-FF.pdf
 

EHY

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Re: How to design CML(Current Mode Logic) type RS-latch

I followd image you attached but simulation result is quite different from what i want

SR-latch that i want sets when signal of S is high and resets when signal of R is high

could you attach your simulation result(wave form)??

ps. i attach my simulation result.
sr.PNG

As I told you above, just use the Master part of the ECL version.

  • Leave the clock circuit away
  • Replace the BJTs by nMOSFETs
  • ... and that's it:
View attachment 116209
 

BradtheRad

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Re: How to design CML(Current Mode Logic) type RS-latch

SR-latch that i want sets when signal of S is high and resets when signal of R is high
You want to invert the operation. This can be done by:

(a) Substitute P-devices where there are N-devices (and vice-versa). If there are diodes, reverse their orientation.

(b) Reverse the positive and negative supply leads.

After this, the schematic needs to be redrawn. This is done by flipping it head over heels.
 

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Re: How to design CML(Current Mode Logic) type RS-latch

Thank you your advice; but, I don't understand clearly.

so, Could you please attach your schematic??

Now, I just make SR-latch using CML NOR gates. Signal of Q is correct what i want; but, Signal of Qb is not consistent with inverted Q

You want to invert the operation. This can be done by:

(a) Substitute P-devices where there are N-devices (and vice-versa). If there are diodes, reverse their orientation.

(b) Reverse the positive and negative supply leads.

After this, the schematic needs to be redrawn. This is done by flipping it head over heels.
 

erikl

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Re: How to design CML(Current Mode Logic) type RS-latch

SR-latch that i want sets when signal of S is high and resets when signal of R is high
S & R usually are low active! If you want it the other way, exchange them.

Here's my example with simulation result. Pls. note that I've exchanged R & S . Different W & L & resistor values.
Q is HIGH only when S=HIGH & R=LOW. CML-SR-FF-sim.png
 
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BradtheRad

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Re: How to design CML(Current Mode Logic) type RS-latch

Thank you your advice; but, I don't understand clearly.

so, Could you please attach your schematic??
This website has an interactive RS flip-flop. It is simpler than the schematics above. It illustrates how the circuit demonstrates its 'memory'. This is done by keeping the inputs normally low.

It is when you pull an input high, that you are operating it as an RS flip-flop.

http://www.rs-flip-flop.com/index.php?page=rs

As you click an input, watch carefully whether the output changes state.

Also watch it as you release the input. The memory principle works only when you keep the inputs normally low.
 

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