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Here's the schematic of an ECL-Master-Slave-FlipFlop: View attachment 116180
You can use the D inputs as R/S inputs. Probably the Master part (Q1 .. Q7) is enough for your purpose.
I don't need CLK
I want same operation just like RS-latch composed of NOR gates.
so, How can i design it using CMOS?
As I told you above, just use the Master part of the ECL version.
View attachment 116209
- Leave the clock circuit away
- Replace the BJTs by nMOSFETs
- ... and that's it:
SR-latch that i want sets when signal of S is high and resets when signal of R is high
You want to invert the operation. This can be done by:
(a) Substitute P-devices where there are N-devices (and vice-versa). If there are diodes, reverse their orientation.
(b) Reverse the positive and negative supply leads.
After this, the schematic needs to be redrawn. This is done by flipping it head over heels.
SR-latch that i want sets when signal of S is high and resets when signal of R is high
Thank you your advice; but, I don't understand clearly.
so, Could you please attach your schematic??