As the title says.Could anyone guide me to some material?
Thx very much.
sincerely...
marlboro_x
Added after 1 hours 8 minutes:
When the signal is high,output should be high after about 150mS.
I used a PMOS current source to charge the Capacitor,followed by several inverters. The Cap is MOS Cap,it's too big and take large area.how to design a delay circuit using smaller Cap?
I think you can do like this:
Use LM555 IC to create a Pulse wave which has duty cycle and frequency belong to your adjustment. Use this Pusle to charge a capacitor through a resistor.
Use a comparator to verify the voltage threshold on a pole of capacitor and turnup your circuit's stage. Delay time can change by change the duty cycle and frequency of the pulse. Duty cycle is more width and frequency is lower, delay time is shorter!
You can modulate delay of the gate by changing current through it. Like in rinng oscillator VCOs.
In case you spend enough time with characterizing it it works.
You can make a first capacitor charging generator (using cap_mos + inverter) and use a counter made with severals flip flop. When the capacitor reach the threshold value, you discharge it using inverter output, and make it charge again until the counter value is obtained.