Re: how to design a soc?
weng and salma,
ASIC is a general word. Even Professor Michael Sebastian Smith (Hawaii) and Prof Jan Rabaey (Berkeley) claimed that the over-interchangable usage of terms confused designers themselves.
Here's the official definition of ASIC and FPGA.
ASIC = Application-Specific Integrated Circuits. It comes in two main families:
(1) Programmable ASICs such as FPGA, CPLD and SPLD.
(2) Custom ASIC - Full-Custom and Semi-Custom.
There is a 3rd family but not entirely classified as true ASIC is the standard components such as 7400s, 7420s, etc for simple logic gates. These are used in random logics for a specific application. For example, you may be designing a simple linear feedback shift register LFSR for pseudorandom generation of numbers using many D-Flip Flops and XOR gates, then such design and implementation is targetted as a SPECIFIC APPLICATION. Therefore it is also ASIC, but not a true ASIC.
Professor M. S. Smith also explained this in his books.
In practice, as a ASIC design engineer for over 5 years and a mixed-signal engineer for over 4 years, when we call ASIC, we usually mean the Semi and Full Custom ASIC. If we want to talk about programmable ASIC, we simply call FPGA, CPLD or etc. This is a conventional way of putting the word ASIC among ASIC designers.
Wherever you go, Europe, USA, Asia, the word ASIC usually refers to full or semi-custom ASIC. Not a doubt. Trust me!
It is usually the fresh graduates or poor graduates from lousy universities that didn't teach the right thing made them confused.
Note: ASIC does not necessary restrict itself to Digital. Even an A/D converter which is a mixed-signal component is considered a Full-Custom ASIC. This is because many A/D or D/A are manually done and tuned by the analog design engineer on Cadence Virtuoso/Spectre. Such "manual" work is considered Full Custom.
In the past, many microprocessors are done as full-custom IC or ASIC before the 90s when EDA-CAD tools were still quite primitive. Many engineers are employed to manual route cells and domains. This is not true today! Many microprocessors today are semi-custom because for ensuring functionality, only the working cores are re-used to speed TTM (time to market). It would be very silly to do full custom ASIC on digital today.
Here are the terms:
FPGA - Field Programmable Gate Array. It is a chip with a highly-organised array of SRAMs, MUXs, and Programmable Switch Matrices. The SRAMs are used as LUTs(Look-up Tables).
FPGA is used for rapid-prototyping using vendor tools such as Xilinx ISE and Altera Quatus II.
You may find FPGAs provided by Altera, Actel and Xilinx.
CPLD - Complex Programmable Logic Devices. It is a more complex version of SPLD.
SPLD - Simple Programmable Logic Devices such as Programmable Logic Arrays PLA (Programmable AND and OR Arrays), Programmable Array Logics PAL (Programmable AND, Fixed OR array), PROM (Programmable Read-Only Memory such as EEPROM or OTPROM etc). Examples of PAL is the AMD-Lattice 16v8 and 22v10 that have macrocells at the outputs, programmable AND array and fixed OR array.
SOC is System-on-Chip. It is about putting specific functional cores into a single chip solution. For example, putting MAXIM WLAN Transceiver core, Wolfson Codec core, MAXIM Power regulation core, Infineon 8k SRAM core, etc into a single chip.
SOC is not just putting only digital cores together. The concept also puts together RF, R-Analog/Mixed-Signal, Analog-baseband, Analog-Digital/Mixed-Signal Baseband, Digital baseband as well.
The greatest challenge in SOC is
(1) IP re-use issues and Patents
(2) Thermal and Hotspots
(3) High-frequency/EMI Issues
(4) High-speed Interconnect and Bus density Issues
(5) Very high mask costs to permit different technologies. For example, the digital and analog could be using 0.18 micron CMOS technology, but the RF might perform better in 0.25 micron or using SiGe instead. Therefore to compromise everything in a single CMOS technology is not easy at all.
You may have some digital cores previously and SUCCESSFULLY implemented in FPGA, then in ASIC, before re-using it into SOC.
SOC is not necessarily re-using components found in PCB. It is about putting SUCCESSFUL cores used in other ICs. Passives components used in PCB would instead be used as Embedded Passives under the substrate using a special surface mount technology unlike the ones used in SMT PCBs.