How to decide the over drive voltage ?

[sj95]

Dear all :

When you design your analog IC, what over drive voltage is in your circuit ?

Id=K(VGS-VTH)^2 , VGS- VTH = Vov (over drive vlotage)

How to select a Vov ?
By process or by function ??

Thanks a lot.

 

[hr_rezaee]

hi
I think it depends on both of process and function.
regards

 

[rajanarender_suram]

The Vov is decided both by process and function

As process is concerned minimum Vov is required for the fets such that they donot go into weak inversion region sasy(0.2V for 0.18um process).

Above Vov minimum the value of Vov is decided by the function.

such as smaller Vov gives high cutoff freq, and Larger Vov gives higher gain
its a trdeoff between the both

 

[sj95]

If I have a voltage reference, what Vov is suitable?
0.1 , 0.2 or 0.3 ?

Thanks a lot.

 

[rajkumaru]

Hi,
I think overdrive voltage is defined by process. You have not mention that which tech are you using. for .18, I think it should be 0.2v

 

[tandr]

200mv or 300mv is the most normal choice

 

[hr_rezaee]

hi
we can change Vth by Vsb (source-bulk) so we can change Vov.
regards

 

[sengyee88]

Vov is heavily dependant on Vth, hence temperature. Depending your operating temperature and driving current, the Vov could be very different even if you are using the same process.

May be you can run a corner simulation at lowest temperature with highest possible current (respect to that lowest temperture) and slow transistor corner, to see how much Vov u need to make sure the MOS is still in saturation.

hi
we can change Vth by Vsb (source-bulk) so we can change Vov.
regards

The transistor models that foundry provide is normally accurate respect to Vsb=0. If Vsb/=0, you need to question yourself if the model is still accurate to silicon test. Else, you may need to add your own offset to the simulations.
[/quote]

 

[janziobro]

Well general rule of thumb is VoV > 50mV in 0.18 to be in strong inversion (that is transistor fully turned on). However if you have acces to the quality model files from the foundr you can safely design the transsitrs to be in week inversion or even in subtreshold VoV < 0 (which one cannot avoid if doing really low power/voltage designs).

 

[sj95]

Hi all :

If the Vov is too small, i.e. 50mv or even 10mv , 0mv.

Which possible fault will happen easily ?

Thanks

 

[okawa]

every Vov has its position.
there is a rule:
If MOSFETs are current match, then make the Vov as high as possible, it will make the current mirrors outputs better. But it will reduce the head room.
If MOSFETs are voltage match, then make the Vov lower, it's good for reducing input offset of differential input pairs and other matched pairs.

 

[evilguy]

rule of thumb

use 0.1-0.2 for voltage match (differential pair)

or

use 0.3-0.5 for current match (current mirror)

 

[hebu]

every Vov has its position.
there is a rule:
If MOSFETs are current match, then make the Vov as high as possible, it will make the current mirrors outputs better. But it will reduce the head room.
If MOSFETs are voltage match, then make the Vov lower, it's good for reducing input offset of differential input pairs and other matched pairs.

Would you explain the second rule in more detail? Why small Vov gets good
voltage matching?

 

[evilguy]

this is taken directly from book that i've read. i think it explain better than me. hope this help.

 

[eejli]

for voltage match >100mv is enough. I even use vod=70mv for some case with head room issues.

 

[hebu]

this is taken directly from book that i've read. i think it explain better than me. hope this help.

Thanks for your reference.
The paragraph describes the mismatch comes from device K, once if the mismatch
comes from threshold voltage, reduce overdrive voltage still works?
And, would you tell me where is this paragraph from? Thanks,

 

[isaacnewton]

Which book you were talking about? Thanks.

this is taken directly from book that i've read. i think it explain better than me. hope this help.

 

[evilguy]

Which book you were talking about? Thanks.

this is taken directly from book that i've read. i think it explain better than me. hope this help.

i took this phrase from "the art of analog layout" by alan hastings

sorry because i take sometime to post reply. i've been away lately.