how to deal with different ground in pcb layout?

[lsy2004]

un-routed net constraint violation

I am doing the pcb layout for wireless board. There are 4 different grounds. 1 digital ground GND, 1 anaglog ground AGND, 1 chasis ground EGND, 1 power ground GND0. Does anybody know how to deal with these different grounds?

I split ground plane. When i run DRC, i got the errors such as :

[Un-Routed Net Constraint Violation]
Net GND is broken into 44 sub-nets. Routed To 88.12%

[Un-Routed Net Constraint Violation]
Net AGND
Warning - Pad/Via touching plane splitting primitives 04:34:07 PM
Class Document Source Message Time Date No.

[Un-Routed Net Constraint Violation]
Net GND0
Warning - Pad/Via touching plane splitting primitives 04:34:07 PM

How to solve these?

Thanks.

 

[Allen_He]

advantage of different ground in pcb

"[Un-Routed Net Constraint Violation]
Net GND is broken into 44 sub-nets. Routed To 88.12% "
--->Your net have not been connected completely.

"[Un-Routed Net Constraint Violation]
Net AGND
Warning - Pad/Via touching plane splitting primitives 04:34:07 PM
Class Document Source Message Time Date No.
[Un-Routed Net Constraint Violation]
Net GND0
Warning - Pad/Via touching plane splitting primitives 04:34:07 PM "
--->The Pad or Via you placed is touching the lines which splitted the planes. You can ommitted them usually. Re-adjusting them is a better method.

 

[vij]

pad/via touching plane splitting primitives

"[Un-Routed Net Constraint Violation]
Net AGND
Warning - Pad/Via touching plane splitting primitives 04:34:07 PM
Class Document Source Message Time Date No.
[Un-Routed Net Constraint Violation]
Net GND0
Warning - Pad/Via touching plane splitting primitives 04:34:07 PM "
--->The Pad or Via you placed is touching the lines which splitted the planes. You can remove this by increasing the separation between two primitive

 

[svu]

pcb is broken into

Try to split the Gnds planes consistantly every layer through the board. Meaning no overlap gnd planes between layers.