How to deal with a rom in module code in DC?

[floatgrass]

one question

if I write a module as follows:
module .......
...
....
...
rom (........);
..
endmoudle


we know that rom can not be synthesized by dc,so only can be intantiated as above.
but how i deal with this code in dc. because rom general can not be synthesized.
thanks

 

[cuiyujie]

I am not very sure about your problem. What are you supposed to do with your rom? If you just want to verify your design, you didn't need to care its implementation and simply model it as an array of integers or array of std_ulogic. All you need to do is in your testbench you first write it the data you want and never change.