msdarvishi
Full Member level 4

Hello,
I am working on a design that a Linear Feedback Shift Register (LFSR) is providing a sigal for a module connected to nits output. Now, I am going to bring the LFSR signal into the Testbench and make a delay on one of its cycles and see its effect on the consequent module behavior. I am wondering a way to bring such a signal into the testbench as of my purpose.
Any kind help is cordially appreciated.
Regards,
I am working on a design that a Linear Feedback Shift Register (LFSR) is providing a sigal for a module connected to nits output. Now, I am going to bring the LFSR signal into the Testbench and make a delay on one of its cycles and see its effect on the consequent module behavior. I am wondering a way to bring such a signal into the testbench as of my purpose.
Any kind help is cordially appreciated.
Regards,