How the transistor work?

[hiramlee]

I design a very simply transistor circuit, and we all know about it.

The frequency of input signal is 1KHZ ,and magtitude is 1Vp-p.when the load resistor Rl5=100K， the Pspice give me such a result as below:

在输入为1KHZ，1Vp-p情况下，在100KHZ负载情况下该电路的仿真效果图：
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Obviously ,the output wave was cut off when greater than 0.6V, and Magnification didn't exactly equal to 5 as we want.

可见输出在正0.6V左右出现了截止情况，大于为0.67V的输出被削峰。而且负的最大输出为2.1V放大倍数没有达到预想的5倍。
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这是为什么么呢？
Now i change the R19 to 10K ,and it became:
下面随意改动几个数据，将VCC串联电阻减小到10K的输出:
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Then, we cancel the R19,and now it's better.and I want to know why.
削峰现象消失，此时输出最大值为2.25，基本达到预期目标。
把R19减小为0时，情况又有好转。
请问这是什么原因呢

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I guess that maybe the R19 lead to a improper DC operating point and that's my wrongdoing.

Vo=Vcc-Ic*Rc and approximate: Vcc-Ie*Rc,=Vcc-(Vb-Vbe)/Re*Rc,
when i set a improper Dc operating point , Saturated distortion occured
And if Vb is too low, a little Vi lead to Saturated distortion
And if Vb is too high, a big vi lead to Saturated distortion

Is it true and anyone can tell me something about it .
many thanks.

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Someone tell us that it's better set Vc to half of VCC.

 

[hiramlee]

when the emitter follower overload, the output get truncated

In a design of emitter follower, when Rl get smaller to less 1k, the output Vo is truncated.
The schematic as follow:

The simulation result of Pspice as follow:


As I know , in a emitter follower , Vb is fixed according to their resistor value. So, we get :Ve = Vb - Vbe; it's also fixed.
That is to say the Ve has nothing to do with Rl.
But it's not.
Why

 

[crutschow]

If you look at the emitter voltage of your circuit, you should be able to understand what is happening.

 

[jeffrey samuel]

the emitter voltage is higher in the first case and so the Vce is lesser there by the signal is attenuated

where as in the second case the Q point is in more or less suitable place for you to get a complete op wave without any op distortion

 

[hiramlee]

Many thanks for your help.
Now,I guess the current outstrip its maxim value . Any transistor has a limited load capacity. The value equals to output voltage Ve
divided by maxim output current . So when the load smaller than the minimum as mentioned , we can see what have happened.

 

[jeffrey samuel]

the load capacity is not minimum but we can limit it using the Vce values

If the Vm value is less than half the Vce then we get perfect op but if it is more then the op resultant wave will be cut off as the load line is not sufficient enough to amplify the ip signal