how processor can program the EPC16 (@ltera)

Thread starter kobik
Start date Jul 22, 2003

Status: Not open for further replies.

Jul 22, 2003

kobik

Member level 3

hi,

i need to add a feature to my project for updating
the VHDL code at customer site

how to connect the processor to program the EPC16
the EPC16 has jtag interface for production, the
customer doesn't have access to the jtag

what software i need to buy/download and what type
of file i need to produce

thx,
kobi

Status: Not open for further replies.

Similar threads

A
How can I run verilog code with data at a specific time in the past?
- Started by alexis57
- Jan 28, 2024
- Replies: 2
PLD, SPLD, GAL, CPLD, FPGA Design
M
How to connect AXI_LITE port of QSPI_FLASH to the RISC-V processor.
- Started by michaelScott
- Dec 31, 2022
- Replies: 0
PLD, SPLD, GAL, CPLD, FPGA Design
M
How to instantiate another vhd file inside testbench, where the testbench is used for opening files
- Started by metamisers
- Jan 6, 2024
- Replies: 6
PLD, SPLD, GAL, CPLD, FPGA Design
[SOLVED] Verifying the CRC-16-CCITT calc
- Started by dpaul
- Mar 14, 2024
- Replies: 2
PLD, SPLD, GAL, CPLD, FPGA Design
X
VHDL Testbench (Weird output in the simulation)
- Started by Xenon02
- Jan 21, 2024
- Replies: 18
PLD, SPLD, GAL, CPLD, FPGA Design

how processor can program the EPC16 (@ltera)

kobik

Member level 3

Similar threads

Privacy & Transparency

Privacy & Transparency