Puppet123
Full Member level 6
Hello,
Please see attached picture.
What is V in the clocking - ie. 2d/v and what is the timing of the reset clock ? When is the reset clock set, how long and why ?
Is is reset every OSR clock cycles ? Also isnt just setting an ideal capacitor with initial condition zero in simulation the same as setting a reset signal ?
Thank you.
Please see attached picture.
What is V in the clocking - ie. 2d/v and what is the timing of the reset clock ? When is the reset clock set, how long and why ?
Is is reset every OSR clock cycles ? Also isnt just setting an ideal capacitor with initial condition zero in simulation the same as setting a reset signal ?
Thank you.
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