In ripple carry...at every stage carry propagate to next stage so then next stage can start it computation....don u see here that for large number of bits every stage has to wait until previous stage has finished computation...and so it is the slowest of all adder...
Where as in CLA which says carry lookahead adder....here compuotation is divided into 2 cycle(u can say it roughly) ...in first cycle all blocks of takes in input and gives out propagate and generate bits....this is done parallelly where u don need previous carry....then the main block compute the carry for all block simultaneouly using this P and G terms retrived from all blocks....and inputted back to individual block....now sum term is calculated parallely again....thus all output bits are out at same time....and thus u save many delay unit....thus it is fastest.....
For further detail i will suggest any computer architecture book....or DIC by Rabaey...
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In ripple carry the carry of each stage propagates i.e.ripples to next stage and is necessary for the next stage to start....
In CLA the carry of all the stages is calculated in advance and hence a stage no more have a need to wait for a carry to be given by its previous stage....
Basically, the carry lookahead speeds up addition by reducing the number of gates in the logic chains between the less significant input bits and the more significant output bits.
As this is in a programmable logic forum...
Due to geometry and the need for routing, an FPGA's built-in ripple carry can be significantly faster than a synthesized CLA due to routing delays in the CLA configuration.