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[SOLVED] carry save adder with five operands input

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Ngised

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I am getting an error in my design with Vivado and it is in the CPA last level. It means I am doing something wrong in my design.
How to connect the sum(4) in the output? I am getting a different result (91 instead of 75), what I am doing wrong?
 

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Solution
No, I think the whole structure is wrong. We need one more row of the next two operands and not three totally. Lets say we have three in the first row { c, b, a} and in the next row { e, d} and then I should connect it all together to the CPA. But first I am gonna do it by hand. Just don't spend my time to reprogram it.
--- Updated ---

It passed all the test I tried different values and it works. It was one of most overworking projects I have ever done. It was just a HA over the S4 and not below it.
Error means wrong result in pencil-and-paper simulation.

I don't know how the correct structure would look like, but this can't be right. Simply look where the carry bit of the upper left FA arrives at the output. It's one bit position too high, 2^5 instead of 2^4.
--- Updated ---

Need an additional FA below the present S4 bit to process this carry bit.
 
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    Ngised

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Hi,

usually there is an "error message" that gives you a hint about what´s the problem.

Klaus

There is not an error in the synthesis, there is structural problem of the carry save adder. The only error message I get is the assertation of the simulation. The result should be 75 and it is 91.
 

Error means wrong result in pencil-and-paper simulation.

I don't know how the correct structure would look like, but this can't be right. Simply look where the carry bit of the upper left FA arrives at the output. It's one bit position too high, 2^5 instead of 2^4.
--- Updated ---

Need an additional FA below the present S4 bit to process this carry bit.

Thanks buddy for the food for thought! It was actually 2 HA's below S4. After trying a lot of solution models I found the right answer. I provide the solution for everyone who has this problem with odd input operands.
 

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Did you check the solution with all possible input values, not just 5x15? What do you see with input {8,8,0,0,0} ? I see 32 but it should be 16.

Circuit not yet correct, I think.
 

Yes is not correct I checked with other values but doesn't work. Well it works with most of them in the simulation but not with alternative values. I am trying to figure out an alternative structure. I run it by hand only with 15 values but not for others.
 

Consider a simple rule. Carry output of an adder column always goes one column left, not two columns.

Still think that a FA has to be used in place of the new HA.
--- Updated ---

HA is sufficient, but two signals need to be crossed. Upper left carry signal goes to the S4 HA, the carry signal of the lower left FA to S5 HA, according to above stated rule.
 
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No, I think the whole structure is wrong. We need one more row of the next two operands and not three totally. Lets say we have three in the first row { c, b, a} and in the next row { e, d} and then I should connect it all together to the CPA. But first I am gonna do it by hand. Just don't spend my time to reprogram it.
--- Updated ---

It passed all the test I tried different values and it works. It was one of most overworking projects I have ever done. It was just a HA over the S4 and not below it.
 

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  • 1654478681315.jpg
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Last edited:

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