GAL22V10 largest adder

[Mina2016]

Hello.
I programmed a GAL22v10 by vhdl code of 4 bit two’s complement ripple carry adder with overflow detection. The last part was to determine the largest adder that will fit inti a GAL22V10 device.omit the overflow detection circuit. Could you help me with this part. Thanks in advance

 

[wwfeldman]

if i recall, the 22V10 has 10 macro cells, and 22 i/o pins.
an n bit adder can have at most n+1 bits of output
and 2n input bits (n for each number)

you need to fit your adder into 10 macro cells and 22 i/o pins
either the i/o pins or the number of macro cells will be the limiting factor

i remember when monolithic memories invented the PAL
i used a bunch of 20RA10s and 22V10s

 

[Mina2016]

Thank you.
So I can say that the largest adder that will fit in a 4bit full adder in GAL22v10 in this experiment is 4 bit ripple carry adder.
Am I correct?

 

[wwfeldman]

how many macro cells did your 4 bit device use?
how many i/o pins did your 4 bit device use?
how many macro cells and i/o pins not used?

for an n bits adder:
n + 1 pins for output
2n pins for input
hence total pins used is n + 1 + 2n and maximum number of pins available is 22.
how many bits of adder does that lead to?
do you have enough macro cells for that number of bits?

 

[Mina2016]

how many macro cells did your 4 bit device use?
how many i/o pins did your 4 bit device use?
how many macro cells and i/o pins not used?

for an n bits adder:
n + 1 pins for output
2n pins for input
hence total pins used is n + 1 + 2n and maximum number of pins available is 22.
how many bits of adder does that lead to?
do you have enough macro cells for that number of bits?

By using this formula the largeset adder will be 7 bit full adder that can fit in Gal22v10 because the maximum number of pins are 22. Am I right?

 

[FvM]

The previous posts don't consider that the maximal adder bit width is also restricted by the number and complexity of logic terms per macro cell.

 

[wwfeldman]

@FvM:
in a 22V10, there are 10 macrocells, with varying numbers of product terms
2 macrocells have 8 product terms, 2 have 10, 2 have 12, 2 have 14, and 2 have 16.
i believe the sum output ORs together 4 product terms and the CarryOut output ORs together 4 product terms
since the OP is building a ripple adder, and does not appear to do look ahead

@mina
the 22 i/o allows 7 bits, as you said.
the other question - there are 10 macrocells
how many did you use for the 4 bit adder?
each bit requires a SUM output and a CARRYOUT output

another aspect of the problem:
is this a stand alone device, or is it designed for extendability?
that is, can two or three of these be put in series to add larger numbers (numbers with more bits?)

if so, then each bit needs a carry in, number A in, number B in, sum output and a carry output
which means that one of the i/o has to be used for carry in, and one i/o has to be used for carry out.
that means there are only 20 i/o available for the input number and the output number.

 

[FvM]

A half adder or full adder can be made with 2 macro cells. So it should be at least possible to make a 5 bit adder (2x 5 bit in, 6 bit out) with 22V10. The first stage carry term can be probably absorbed by the second stage, saving one macro cell. The second stage carry term can't be absorbed in the third stage because the logic term becomes too complex to be implemented in 22V10. Still not sufficient to make a 6 bit adder, 6 bit adder without carry could work.

 

[wwfeldman]

@FvM
exactly
but the goal was for Mina to figure it out, since it seems like a homework problem

 

[Mina2016]

@FvM:
in a 22V10, there are 10 macrocells, with varying numbers of product terms
2 macrocells have 8 product terms, 2 have 10, 2 have 12, 2 have 14, and 2 have 16.
i believe the sum output ORs together 4 product terms and the CarryOut output ORs together 4 product terms
since the OP is building a ripple adder, and does not appear to do look ahead

@mina
the 22 i/o allows 7 bits, as you said.
the other question - there are 10 macrocells
how many did you use for the 4 bit adder?
each bit requires a SUM output and a CARRYOUT output

another aspect of the problem:
is this a stand alone device, or is it designed for extendability?
that is, can two or three of these be put in series to add larger numbers (numbers with more bits?)

if so, then each bit needs a carry in, number A in, number B in, sum output and a carry output
which means that one of the i/o has to be used for carry in, and one i/o has to be used for carry out.
that means there are only 20 i/o available for the input number and the output number.

If we want to figure out what the largest full adder that can fit in GAL22v10, we need to consider 10macrocells as well. Right? so, it means that there are a maximum of 32 pin numbers. Am I correct?

--- Updated Oct 25, 2022 ---

@FvM
exactly
but the goal was for Mina to figure it out, since it seems like a homework problem

@FvM
exactly
but the goal was for Mina to figure it out, since it seems like a homework problem

Yes, It was a part of the experience that we did two weeks ago.I could not figure this part out.

 

[wwfeldman]

32 pin numbers?
the 22V10 only has 24 pins. 2 for power and ground so 22 i/o pins

if you mean 5 bits, 00000 base 2 to 11111 base 2, or 0 to 31, for 32 numbers, yes
if you mean something else, i didn't get it

but you should think about the questions that were asked :
how many macro cells did you use for the 4 bit adder?
since the 22V10 has 10 macro cells, how many bits can it support?

 

[Mina2016]

32 pin numbers?
the 22V10 only has 24 pins. 2 for power and ground so 22 i/o pins

if you mean 5 bits, 00000 base 2 to 11111 base 2, or 0 to 31, for 32 numbers, yes
if you mean something else, i didn't get it

but you should think about the questions that were asked :
how many macro cells did you use for the 4 bit adder?
since the 22V10 has 10 macro cells, how many bits can it support?

I got it. It only supports less than 10 macro cells. so a 5 bit full adder is the largest one. Thank you.

 

[KlausST]

Hi

so, it means that there are a maximum of 32 pin numbers. Am I correct?

What a professional designer does.. instead of being unsure: he looks into the datasheet.

And the same you should do.
It might sound boring, but the datasheet needs to become your friend.
It´s the most reliable place for informations. It usually tells all you need to know how to use it.
For sure some devices need to be programmed, and the datasheet can not teach programming skills, the just tells you how to get your (compiled) code into it.

So you should be familiar with such basic informatins like pin count and macrocell count.

And if it includes 22 macrocells it may use all 22 macrocells. It depends on your code.
Example:
You may program a 22 bit binary counter into it .. but you can only feed 10 counter outputs to the pins.
If you need more outputs you need additional (external) parts or cascade several GALs.

Indeed GAL22xx series is very outdated. They ar good for learning, but I can´t recommmend them to be used in new designs. They suffer from decreased availability, high (standby) current, non in system programmability, huge dimensions, low complexity...

Learning: Due to the low complexity you are able to read the function back from it´s fuse map. Fur sure no fun job.
But somtimes you need to check the compiler output. I remember back some decades I had a problem with the function of my design and it turned out that this was a compiler bug. Rarely, but it happens.

Klaus

 

[FvM]

Please review the estimation of possible adder size in post #8. 5 bit ripple carry adder implementation uses separate half- and full adders and can be easily verified by pencil and paper. For possible design with absorbed carry terms, you need to sketch the complete logic in and/ or form or use a tool to synthesize it for 22V10. Lattice ispLEVER Classic was the last one to support it, I think.