How does the on-chip PLL work?

[manu_leo]

On chip PLL

Hi,

I wish to know how onchipPLL works,ill be grateful if somebody explains me with respect to At speed testing

thanks
-manju

 

[teteamigo]

Re: On chip PLL

There is a book at :**broken link removed**

 

[ryouma]

On chip PLL

AT-speed-testing means running scan capture at the functional clock freq.

This is also referred to as AC scan, as opposed to normal scan where you run your scan shift/capture at a reduced freq. (scan clk provided by ATE - PLL bypassed)

at-speed test allows you to detect additional fault models such as transitional/delay faults.
while you are capturing during at-speed mode, you need at least 2 pulses at-speed.
And where does your at-speed pulse come from?
PLL