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How does match impedance means?

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shemo

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I seen a finished layout design that has various different impedance values on different layers.
top layer has impedance different than bottom and also inner. They are all different.

I always though match impedance means maintaining impedance throughout top to bottom layer. Obviously this is not the case from that example design.
 

"Matching Impedance" means making sure that the impedance of the transmitter/receiver - matches to the impedance of the transmittion line.
This is done to avoid signal reflection problem.
 

There are several electrical communication standards for which device manufacturers define proper impedance matching to the routed buses that interface to it as shaiko mentioned. You are probably referring to some eventual difference on measured distance, for instance among a twisted pair at different layers, but even being the case, would be not significant and occurs due to dielectric difference on air and the varnish finishing of the PCB.
 

If a signal is routed with defined impedance in impedance controlled PCB design, you'll maintain the nominal impedance through all used layers. This can mean that some layers can't be used by this signal, because the intended impedance can't be realized on this layer (distance of embedding planes too low) or the trace width would be impractical.

Defining a stack-up already decides about achievable impedances.
 

"Matching Impedance" means making sure that the impedance of the transmitter/receiver - matches to the impedance of the transmittion line.
This is done to avoid signal reflection problem.

how to achieve that?

- - - Updated - - -

If a signal is routed with defined impedance in impedance controlled PCB design, you'll maintain the nominal impedance through all used layers. This can mean that some layers can't be used by this signal, because the intended impedance can't be realized on this layer (distance of embedding planes too low) or the trace width would be impractical.

Defining a stack-up already decides about achievable impedances.

you defined the impedance to route and that's all you have to do?
 

how to achieve that?

Modern layout design programs have specific tools for that. Once properly configured the desired impedance parameters of the 'transmission line' and also the model of the physical characteristics of the PCB, you will perform the interactive routing process for the bus the same way as you would do for a single track.
 

With most layout tools, designing trace impedances is done manually. Even if a tool offers some automatism in this regard, you won't be able to to use with much success without understanding how the PCB stackup constrains impedances.
 

Is this impedance value entered as desired or reflection of the actual routing?

look at the impedances values in the picture. They look like actual values after routing.

Originally, I thought they are entered as what you desired. For example, 50 ohm for all.
obviously, that's wrong.


So, my question before routing what should be the values entered in the stackup section. Before routing , how do you know they should be 64.515, 59.949..etc?
 

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The tool shows the expectable impedances for 5.1 mil trace width (under some assumptions like continuous embedding planes, sufficient distance to other traces). You can adjust the trace width (if possible) to achieve an intended impedance, or just check if the impedances are in an accpetable range.

It should be noted that these are nominal impedances, actual values may vary by at least +/- 10 %. In so far designing an exact impedance value without impedance controlled production isn't meaningful.
 
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    kozacy

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