how do we implement "initialization" in our digita

[yuenkit]

I know that
"initial" is not a synthesizable construct. It cann't be synthesized into hardware.

My question is, how do we introduce the initialization block into our synthesized design?

 

[felixyan]

Add set or reset to Flip-Flop, and that mapping to initial value of REG.

 

[sree205]

for eg. this is how its done in verilog. assuming reg is the output of and operation,

always@(posedge clk or negedge rst)
begin
if(!rst)
reg <= 1'b0;
else
reg <= x && y;
end

 

[jjww110]

use pre-set or reset to Flip-Flop, memory cell also have all 0s or ffs after por.

 

[yuenkit]

oh, sorry, i din't make my question clear.

I am wondering, how the real system implement initialization. using Analog block during power up?

how does it connect to the digital block

 

[love2read]

analog module detects voltage changes at power on and sends out power on reset to digital.

 

[AlexWan]

For system, usually, Power-On reset--> All register to default values-->Start first read operation from ROM.