how do I measure transister area and Vt mismatch in cadence?

[sharkies]

Hi, I'm trying to figure out transistor area mismatch and Vt mismatch using cadence ADE.
I'm assuming that this is done in Monte Carlo...
It's my first time using this, any clearer directions?
How can I get those parameters to plotted?

Also, for a simple transistor, If I run mismatch instead of 'process &mismatch" , then my histogram shows that the simulation outputs(the transistor current) are all in a single bin. Do I have setup issues here?

 

[erikl]

Re: how do I measure transister area and Vt mismatch in cade

Counterquestion: Did you include the mismatch files of your foundry's PDK into your simulation setUp?

 

[sharkies]

Re: how do I measure transister area and Vt mismatch in cade

ok... i loaded it properly, and now I see both mismatch and process... How do I get the vt and area variation?

 

[Vabzter]

Re: how do I measure transister area and Vt mismatch in cade

Hi,
You can refer a paper on transistor mismatch by Pelgrom. Generally mismatch = const/sq.rt(area)

You have to look into your process manual to find out this value for the constant.

BR
Vab

 

[sharkies]

Re: how do I measure transister area and Vt mismatch in cade

Is there anyway I can just obtain this with monte carlo simulation?
I have tons of process manuals it would be difficult to find the one that I need.

 

[love_analog]

Re: how do I measure transister area and Vt mismatch in cade

Run a sample of differnet W/L transistors. Get the variation from histogram. Plot the variation on one exis and sqrt(WL) on the other.

 

[rfsystem]

Re: how do I measure transister area and Vt mismatch in cade

Is the intention of your question to know after a monte-carlo the individual contributor list?

 

[Wu_uW]

Hi,

Try with your Calculator, I believe you can histogram Vt there.

regards