I am not sure that I completely agree with SkyHigh about not using MOS as capacitors. The primary leakage in small geometry devices is source-drain leakage. What this leakage essentially means is that the device can not be completely turned off. In the case of a MOS cap, the source is tied to the drain, so THAT leakage is unimportant.
As gate oxides get thinner, there is some increase in gate leakage, but that remains a very small term.
Leakage from the source or drain to the substrate or well can also be an issue, but typical MOS caps will have zero bias from source/drain to well or substrate.
The MOS cap is not good for many analog uses since it will have a large change in capacitance with voltage, but as a filter cap on the gate of a current source, for example, the MOS cap is just fine, and using the dummys for this purpose should not cause a problem, in my opinion, particularly if one end of the cap is connected to the power supply.