bianchi77
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Thanks mate, I'll try and see what happen.you need to use timequest to set timing constraints, you cannot use the ucf file. Timequest uses sdc files.
equivolent would be
create_clock -period 30 -name TS_clk [get_ports {TS_clk}]
This creates a clock and names it locally as TS_clk. then you associated it with the pin TS_clk (so the clock name doesnt have to match the pin name).
Where can I find that menu ?By running the Timequest Timing Analysis Wizard in Quartus, you are guided step-by-step through the basic settings.
from here -
constraints -> create clock
Is it related on how to set a clock for EP2C8Q208 ?If your design has PLLs then use TimeQuest Timing Analyzer from ASSIGNMENTS and if it's the other way round you can directly go from TOOLS
Is it related on how to set a clock for EP2C8Q208 ?If your design has PLLs then use TimeQuest Timing Analyzer from ASSIGNMENTS and if it's the other way round you can directly go from TOOLS
Thanks for the knowledge I'll find out on the handbook of altera...Short version: yes requires external clock and yes you will have to set a constraint that tells the tools what kind of clock you are using. As for constraints ... I know xilinx has a constraints guide. I am not well versed in Altera stuff but I would be surprised if they do not have the exact same documentation-like-thingy-you-can-read to find out how to set up these constraints.
Thanks for the knowledge I'll find out on the handbook of altera...