How BJT is formed in CMOS process??

[amitabh262002]

latch up bjt

Hi all,
pls send me the answer of the following question

How BJT is formed in CMOS process??

 

[kiran81077]

Hi,

If i am getting your question right, you are looking for manufacturing process of BJT similar to CMOS transistors.

Some of the keywords that i can mention is LOCOS, Collector-Diffused Isolation.

It has been very neatly explained in "VLSI Fabrication Principles" by S.K.Ghandhi.

Cheers,

Kiran

 

[manikumar1207]

hai,
I think u r asking how bjt is formed in the cmos process, In cmos process there are some parasatic bjts formed namely lateral and vertical bjt.

please inform me if the question is the other way.

 

[vinaychimalgi]

I think u are talking about the parasitic capacitance formed by the cmos under latchup condition:idea:

 

[ameed]

How BJT is formed in CMOS process??


Hi,

BJT can be form in cmos based on W and L and doping concentration.
bipolar cmos technology can use same cmos and bjt.

If i am getting your question right, you are looking for manufacturing process of BJT similar to CMOS transistors.

Some of the keywords that i can mention is LOCOS, Collector-Diffused Isolation.

It has been very neatly explained in "VLSI Fabrication Principles" by S.K.Ghandhi.

 

[abhaykochhar2]

read weste eshraghian book or Sorab K Ghandi...

 

[khotkar]

In The TSMC file it given.
In Cadence u can take directly instance, for different technology.
If u want to understand fab process use Gandhi book.

............................

 

[qqic]

2 kind, lateral and vertical

 

[venky442]

Parasitic BJTS can be formed in CMOS process whenever latch up occurs.
Latch up mainly occurs only when N-well and P-substrate Impedances increase to very high.
these can be avoided by using guaded ring structures and bury contacts..

 

[lijianheng]

P implant, N implant, N well and P substrate