liwei039
Newbie level 6
Hi, all
when I using VCS to run post-layout simulation, I found some signal is High Z value in the beginning, but when I using ncverilog, there is no such issue. why?
In VCS, I found a BUF output is Z value whatever input is 0,1 or X value.There is no force or other reason to make this signal to Z value.
How to fix this issue or bapass it ? Thanks.
when I using VCS to run post-layout simulation, I found some signal is High Z value in the beginning, but when I using ncverilog, there is no such issue. why?
In VCS, I found a BUF output is Z value whatever input is 0,1 or X value.There is no force or other reason to make this signal to Z value.
How to fix this issue or bapass it ? Thanks.