The drain extension under the gate forms a lighlt doped region between drain and channel that the high voltage can be dropped across such that there is no punchthrough or breakdown between drain and source. These kinds of transistors are good for 40V and below. For higher voltages drift regions are required.
For very high voltage MOSFETs, a thick N- epi layer is used as a drift region to drop the high voltages. Filed rings are also used to shape the depletion to keep the high field edges of the depletion zone away from critical areas. Thus, the layout of very high voltage transistors is very different from conventional CMOS.[/img]