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High speed amplifier with 50ns settling time

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engrvip

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high speed amp settling time

can somoene suggest a suitable architecture and techniques i should follow in designing a high speed amplifier with 50ns settling time????

if u have some relevant study material regarding my querry plz give info. regarding it??

thanks
 

hr_rezaee

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“indirect feedback compensation of cmos op-amps

Hi
it depends your gain too.
maybe simple telescopic cascode
or gain boosted telescopic cascode

regards
 

kwkam

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It depends on what is you specific for example slew rate, step voltage.... Hard to said possible or not.
 

lijianheng

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It depends on your cuicuit dc gain, gain bandwith. It should can be achieved.
 

yalanand

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You cant go for telescopic if your voltage is low...
 

engrvip

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supply voltage is 3.3v

0.35 u technology

have to use it as buffer to drive heavy load.

High i/p and o/p swings needed.


now plz suggest me what architecture should i use......intitially i thought of using class AB ip stage opamp....but then decided to go ahead with Folded cacode architecture.....is it OK to go ahead with FC....as high swings will be a problem in telescopic structure.
 

wael_wael

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i suggest u use folded cascode with CS out put stage it has high swing output, high settling time, use Nmos transistors as differential input
 

gaom9

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This paper may help you: Indirect Feedback Compensation of CMOS Op-Amps, R. Jacob Baker


Best regards!
 

yschuang

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I want to add one reminder.

For folded cascode, nmos input pair has a better input gm but poor PM due to the 2nd pole caused by pmos load.
 

wael_wael

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thats right, usualy nmos have higher PM, gain. if ur first stage with nmos, so the second stage is PMOS
best regards
 

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