Very high speed switch?

[Javert]

I have a load of 300k Ohm, 50pF and I need to switch a 5V voltage to it using a GPIO MCU, for example some STM32. Yes simple, just a small transistor for example BC847. Yes, it's simple, the leading edge goes from 0 to 5V in about 6ns.
But I would need a 5x faster transition, how to do that?

Thanks

 

[BigBoss]

Use a Switching Transistor. I don't know it will accelerate 5X but it will be much better than simple BC547.
They are generally High Frequency Transistors but they are also used for Switching Purposes.

 

[KlausST]

Hi,

C = I * t / V
--> I = C * V / t = 50pF * 5V / 1ns = 250mA

Quite a challenge.

Klaus

 

[crutschow]

What do you need such a fast rise-time?
What is the switching frequency?

 

[dick_freebird]

A low side GaN FET driver (at least one of the better
ones) might be the ticket here.

 

[barry]

I have a load of 300k Ohm, 50pF and I need to switch a 5V voltage to it using a GPIO MCU, for example some STM32. Yes simple, just a small transistor for example BC847. Yes, it's simple, the leading edge goes from 0 to 5V in about 6ns.
But I would need a 5x faster transition, how to do that?

Thanks

No, it's not simple.

As Klaus points out, you need a lot of current. And then you have to consider the switching time of the device you use to drive that current. I'd look at using a MOSFET. And what about the switching time of your GPIO?

And why do you need such a fast transition?

 

[D.A.(Tony)Stewart]

tR=1ns is defined how? 10~90% ??
or 0~63% ?? or 0 to 99%
C= 50pF
if R=C/Tau =50e-12/1e-9= 50e-3
thus use a FET half bridge with Rdson < 50 mohm

 

[FvM]

Wrong math. R= Tau/C

 

[D.A.(Tony)Stewart]

tR=1ns is defined how? 10~90% ??
or 0~63% ?? or 0 to 99%
C= 50pF
if t= Tau then R=Tau/C =1e-9/50e-12= 20 ohm

This is the nominal RdsOn =Vol/Io for all 3.6V CMOS logic @ 3.3V with variable tolerance
STM32 datasheet defines the fastmode as this;

I interpret the Max spec. as this;
VolFM+ / Iio = RdsOn = 400mV / 20 mA = 20 Ohm but this is limited to 3.6V

If you want a buffer with a 5V swing, then most CMOS 5.5V logic is 50 Ohms +/- 33% or so.

So you could use 3.3V output from a STM32 port into a 5.5V logic buffer and use 3 or more inverters in parallel to lower the RdsON.

Does that satisfy your spec?

--- Updated Feb 1, 2024 ---

I would look at the rise times for 74LVCxx family at 5V . Miller capacitance may cause it to exceed 1ns. This will depend on your layout with decoupling , low ESL and other factors not mentioned in your spec.

 

[oscillationeer]

I have a load of 300k Ohm, 50pF and I need to switch a 5V voltage to it using a GPIO MCU, for example some STM32. Yes simple, just a small transistor for example BC847. Yes, it's simple, the leading edge goes from 0 to 5V in about 6ns.
But I would need a 5x faster transition, how to do that?

You need to apply voltage gain so that dV/dt out is over 5 times the 'leading edge' of the STM32
drive signal. A fast NPN transistor, with R//C emitter load, possibly in cascode with a higher voltage
drive transistor, can give you a fast output fall-time, and Baker-clamping the base to collector can get you
a fast output rise time.

Or, you can trigger a flip-flop in a faster logic IC; flip-flop and Schmitt trigger circuits have
risetime/falltime independent of the input dV/dt. For 5V rise time of 1 ns into a 50 pF load,
the pull-up current required is 250 mA, so it'll take some power.

 

[D.A.(Tony)Stewart]

A BC847 only has a transition frequency of 100MHz min at 5V.
You need both current and voltage gain with low Cout and low Ron at microwave speeds.
Unless you know how to do this, with Ic=C*dV/dt = 50e-12 *12e9=60mA just for the load not including Miller capacitance, a common solution would be common base stages on low loss tangent FR4.

 

[Javert]

Thank you all for your comments.
In the meantime, I also discovered that the output signal from the STM32 itself has a significant effect on the speed.
I dare not quantify how far the slew rate and how far the lower output voltage 3.3V (the original solution was in 5V logic) contributes to the problem.
At first I thought of something like a 5V Schmitt Inverter for the STM32 output.
I have a whole TC7SZ14FU coil.
But due to synchronization and delay, I would have to put the same element on the dry control signal, and the simplicity and elegance of the design is somewhat lost.
I have two 74HC04 inverters available in the design. Increasing the voltage from 3.3V to 5V solves this.Unfortunately, I don't know how far the classic 74HC04 inverter affects the slew rate, does it copy the speed (slew rate) from input to output or not?

 

[danadakk]

Timing from datasheet :

Regards, Dana.

 

[KlausST]

I have two 74HC04 inverters available in the design. Increasing the voltage from 3.3V to 5V solves this.

You increased the HC04 voltage to 5V .... while still have the input from the 3.3V supplied STM32?

Be sure not to violate VIH of the HC04.
--> Better use a HCT04

Klaus

 

[carpenter]

Timing from datasheet :

View attachment 188350


Regards, Dana.

That's probably true, but for a rather monstrous 50pF capacitance nad wide temperature range
Typical gate input capacitance of the 74HC is 3pF at 25C, say, 5pF even with PCB that's a tenth the capacity and higher speed at the same current

 

[danadakk]

That's probably true, but for a rather monstrous 50pF capacitance nad wide temperature range
Typical gate input capacitance of the 74HC is 3pF at 25C, say, 5pF even with PCB that's a tenth the capacity and higher speed at the same current

Maybe I misunderstand what you wrote but timing posted (for HC04 which I neglected to call out)
was for 50 pf load.....which OP wanted driven......

Regards, Dana.

 

[D.A.(Tony)Stewart]

Timing from datasheet :

View attachment 188350


Regards, Dana.

which P/N was that? Transition time is not always specified but is always a function of Rs*Cload to reach Vthreshold which is typically Vdd/2 in specs.

The best transition time occurs from lowest Rs impedance * lowest C load and lowest swing voltage to target threshold.
But RdsOn lowers with rising Vdd so higher Vdd is better.

I suggest you can try 3.3V uC out to Vdd=4.5 driver like yours. This Toshiba part has very low Rs=6.9 ohms at 4.5V (=5V-10%)
The down side is with high impedance traces (50 ~200), and ESL of trace with C load, low Rs will cause overshoot due to high Q of RLC so parasitic ESL must be kept as low as possible at ~1nH/mm which are short wide traces.

e.g. 3 mm trace between output and load ~ 3nH and 50 pF load has a fo= 2.58 GHz and Tr= 0.35/f-3dB= 0.136 ns with Zo= sqrt(L/C)=7.7 ohms or near critical damping at 3mm but if more then overshoot occurs.

--- Updated Feb 2, 2024 ---

This Toshiba Inverter (triple) has the same output Zo but without hysteresis, but still has thermal and tolerance drifts on input threshold similar to Schmitt trigger. It may or may not be better depending if you have resonant ringing on input slope.

https://toshiba.semicon-storage.com/info/TC7WZ04FU_datasheet_en_20200204.pdf?did=20063&prodName=TC7WZ04FU

Cheers,
Tony

 

[Javert]

Thank you all for your comments and let me make a few comments.

1. 74LVC
For example 74LVC04 is available from Nexperia, TI and Diotec, but only from Diotec is for supply voltage up to 5.5V, others only up to 3.6V with 5.5V tolerant inputs. Diotec does produce the 74LVC04, but not other circuits from the 74 series such as FlipFlop or 74LVC74, etc.

2. I tried to measure the slew rate of GPIO STM32F3. GPIO loaded one 74HC04 input. I won't give the exact speed because it is a function of the load capacity and even though I have a 16-bit LRC it may not be easy to measure accurately. Let me put it this way, if I compare the slope of the rising edge of the STM32F3 and the output of the 74HC04 at 3.3V, they are similar, with a 5.5V supply (74HC), the slope of the 74 is already a bit steeper.Compared purely optically on the oscilloscope screen

3.I will give some details about the problem..
From a physical point of view, the magnitude of the current of the leading edge of the pulse creates a magnetic field that interacts with the measured object, and the magnitude of the magnetic field determines the depth of penetration of the mg field, which is a function of the current and, in turn, voltage changes.As a reference, we used a functional generator that generated a pulse with an 800 ps 0-63% 0-5V ramp with the fact that this output was stimulated by a HF NPN transistor connected as an emitter follower, when the output voltage was lower by Vbe.

 

[dick_freebird]

The 74HCT04 (so-called TTL threshold) may be better for a
3.3V in, 5V supply application. Going the other way is a problem
for the input (ESD clamping the signal). There are level shifter
products outside the mainstream family I'm pretty sure.

For very high speed without loading concerns (to first order)
a 3.3V LVDS TX to 5V LVDS RX may be better. I found 80MHz
and 10mA of CMOS drive too weak to get full signal swing on
real 3.3V hardware with PCB loading. But LVDS on same chip
and board was clean past 160MHz.

 

[D.A.(Tony)Stewart]

3.I will give some details about the problem..
From a physical point of view, the magnitude of the current of the leading edge of the pulse creates a magnetic field that interacts with the measured object, and the magnitude of the magnetic field determines the depth of penetration of the mg field, which is a function of the current and, in turn, voltage changes.As a reference, we used a functional generator that generated a pulse with an 800 ps 0-63% 0-5V ramp with the fact that this output was stimulated by a HF NPN transistor connected as an emitter follower, when the output voltage was lower by Vbe.

The actual RLC load and ideal waveform for this analog switch depends on the practical limits of some missing parameters.

As we know dV/dt=Ic/CL where source current limits Ic = V/Rs thus you get the classic dV/dt = V/RsCL
This changes when the load also include inductance of a coil.
When you used a 50 ohm siggen with an HF NPN they hFE often is around 50 so your emitter source Rs becomes 1 ohm = Rb/hFE

Is 1 Ohm source ideal?
Does latency matter or just rise time?
What else matters? Inductance? Threshold? dV/dt? Io? Tolerances? or just minimum dI/dt ?

Some missing parameters need to be nailed down to choose a practical solution.