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High Impedance Pre-Amplifier Design

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kb1vyi

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I am looking at building a Pre-Amp that has a high impedance due to having a high impedance load (Like that of most Piezoelectric Elements). My biggest issue with this is that it needs to feed an ADC that is unipolar but can be either single ended or differential. The circuit also requires bandwidth from 10Hz to about 5-10 MHz. I'm working with a single supply as it is a way to buffer the output and prevent any over voltage from being introduced into the ADC from 0-5V, it is also what the board supplies.

-My main concern is JFETs. Right now I am working with fet input op amps as I have a clearer understanding of how they work and they seem to have wider bandwidth. Also is there such thing as a differential JFET op amp with a VOCM? That would be the most ideal situation.

-Needs to be DC biased at the output to 2.5V.

-Amplifier needs to have adjustable gain.

-I also can't seem to get any of the op amp spice models by Analog Devices to work. They seem to have the lowest noise and widest bandwidth among other manufacturers.

-The circuit must be as low noise as possible.

I attached one of my better schematics, its simply just a OPA355_Q1 JFET op amp in non inverting form with a way to dc bias it. However, the output is half wave rectified due to the single supply. By the way, my simulator is LTSpice.

Any help/criticism is appreciated,
Tyler

Circuit.JPG
Output.JPG
 

Rather than looking for a JFET input diff amp, start out with a single ended preamplifier stage with low noise and high gain, then do the differential conversion with a second stage amp which will have looser noise requirements.

For such a wide bandwidth you'll have to compromise noise performance at low or high frequencies. JFETs are nice for low frequency, bipolar is better for high frequencies. You may even consider using chopper amplifiers if noise at very low frequencies is critical. But to make a selection you should have an accurate electrical model of your piezo over your bandwidth of interest.
 

What is actually "high impedance and low noise "? How many megohms and nV/Hz?

What is the GBW product?

Variable gain? What is the range how many steps?

Maximum output level?

Can you pre-bias the input to 2.5 volt?
And why the input diodes ?

Your requirements are significant, they can't be achieved with a simplistic circuit as shown.
 

-As an estimate the impedance would be about 100 MegaOhms and as quiet as possible with the supplied GBW below as bandwidth is more important to this application than noise.

GBW estimated to be about 200MHz. (Maximum Gain of 20)

The Diodes are there as input protection to the op amp (Extreme voltages).

The voltage can't be pre-biased unless it is done with circuitry prior to the amp.

The original design is with a 2nd order differential low pass op amp with a VOCM that worked well under normal inputs but when high impedance inputs are introduced the gain dropped off.

I know my circuit is probably too simplistic, just trying to get some basic ideas, concepts down. Perhaps I need to pick up a good book on op amps. My difficulty is with biasing to the ADC by using the JFET Op Amps. It also seems that JFET's only seem to have significant gain below 1 MHz if I am correct?

Thank you for your input.
 

Current noise will have you every time with piezo ceramic transducers (Especially at very low frequency).

The usual approach back when I was doing sonar type things was to go for some sort of jfet cascode arrangement at the input, often a linear systems part in cascode with a small bipolar power transistor or another jfet.

The stage is effectively transconductance, so follow with an I/V converter having appropriate gain and offset to suit your output. Resistor noise is **EVERYTHING** so keep the values low where voltage noise is a concern.

Don't forget that these transducers are effectively small caps over most of their operating range, and any transducer with response to 10MHz will be a tiny cap, this means that cable and gate capacitance directly impacts effective noise levels as it forms a potential divider with the transducer (We had nightmares making customers understand the cable thing).

Regards, Dan.
 

-As an estimate the impedance would be about 100 MegaOhms and as quiet as possible with the supplied GBW below as bandwidth is more important to this application than noise.

GBW estimated to be about 200MHz. (Maximum Gain of 20)
That's a lot of GBW for a JFET op amp, there are few parts which meet that spec. Also JFET op amps always require more than a 5V single supply. Most will spec +/-5V rails at least. The closest I could find is the OPA659 which is specced for at least +/-4V.

Also if your circuit truly has on the order of tens of megaohms of input impedance, then you're going to run into many challenges with shielding and guarding that node.

- - - Updated - - -

The usual approach back when I was doing sonar type things was to go for some sort of jfet cascode arrangement at the input, often a linear systems part in cascode with a small bipolar power transistor or another jfet.

The stage is effectively transconductance, so follow with an I/V converter having appropriate gain and offset to suit your output. Resistor noise is **EVERYTHING** so keep the values low where voltage noise is a concern.
A discrete amplifier circuit would be fine for something like sonar which is more narrowband, but if your bandwidth extends down to 10Hz it would be quite challenging to get its biasing stable without loading it with the biasing network.
 

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