Follow along with the video below to see how to install our site as a web app on your home screen.
Note: This feature may not be available in some browsers.
Because most CMOS processes use p- substrates (or p- epi on p+ substrate wafers). Only few CMOS technologies use n- substrates (and then use p-wells, of course). There are also CMOS technologies which use both n- & p-wells on (any type of) substrates (twin well or triple well processes).nnmate said:Why do people for CMOS process use n-well process not p-well?
Highest purity silicon is always p-doped, because Boron has the largest segregation coefficient of all dopants in silicon, i.e. is the most difficult dopant to be removed from silicon during the zone refining process. If n-substrates are required, this has to be done by counter-doping with P or As, which means over-compensation of the p-dopant. Over-compensated semiconductor material usually shows shorter carrier life-time, which may - or may not - be desirable, depending on the specific application.nnmate said:... why do people use p-substrate usually, which advantages do we obtain, when we deposite Bor and Galium (+3 material) at first.