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impedance of a return path question

yefj

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Hello, i am watching this video.they say that the first phot is high impedance whereas the second photo is low impedance.
What exactly makes the impedance high in the first case?
Thanks.
High impedance:

1710145215613.png


Low impedance:

1710145375721.png
 
Hi,

IMHO this video is not really good to explain the inductance of a return path, as indicated in the link. Here, the "input" trace is missing, and consecently the area spanned by the loop and the overall inductance, see [1].

If considering the the trace alone, you can check [2], chapter 8 starting on page 150, to calculate the self-inductance of the trace for a given geometry. Further, you can have a look on a design toolkit [3] to estimate the inductance of the VIAs. Below you can see an example picture, highligthing the inductance in green.

For the two examples, the first one would have a large (self) inductance as the trace itself is long and narrow (at least what is shown) and there are two VIAs with their corresponding inductance. The second one has a lower inductance, but mainly due to the non-interrupted TOP trace. Here, it highly depends on the signal frequency as well as the location of the "input" trace, to judge where the return path is flowing. For "higher" freuencies, the return current will chose the path with the lowest inductance, which is typically in the vicinity of the "input" trace, typically GND plane below the trace to span a small over all loop/area.

1710282953129.png



[1] https://en.wikipedia.org/wiki/Inductance#Inductance_of_a_solenoid
[2] https://nvlpubs.nist.gov/nistpubs/bulletin/08/nbsbulletinv8n1p1_A2b.pdf
[3] https://saturnpcb.com/saturn-pcb-toolkit/

BR
 

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