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Help with bit stuffing in a HDLC code in VERILOG

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nikhilkumar_r

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Hello,

I am pursuing final year of B.Tech, as a final project am working for HDLC.

I am unable to write a code in VERILOG for HDLC..

I have done with code till checking CRC-16, can anybody help me in BIT STUFFING...
please
its very urgent !!!
 

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