Help! who can give me a picture of DFFR layout?

[tony_wu_ad]

Deal all, I am a greenhand of Layout. This week, I have learned how to use tools to draw a layout, now I have layout about INV, NAND, NOR.

Next I want to layout DFFR,but DFFR is to difficult for me, there are so many MOS in this shematic, so I need you help. Who can give me a picture of DFFR? I want to learn how to place so many MOS to reduce the aera.

Thank you!

 

[acbalbason]

hi!

it looks something like this. Ü

- al

 

[micheal_han2000]

dff is the basic device, and you can find a basic layout book.

 

[diemilio]

The following file contains the schematic and layout of a DFFR. This kind of implementation should be used just as an example because DFFR can be built with a lot less transistors and with a much better routing.

Anyway I hope this helps at least as a reference that could give you a global idea of what you have to do.

diemilio

pd: If you need anything else (like the individual layout of each logic gate) just let me know.

 

[skjian]

hi,

Some layout books say that the mos transistor also need a BULK connection and need to add contact. Is that true? why I can't find any bulk contact in the layouts?

thanks!
-S.J.

 

[fixrouter4400]

hi skjian yes in schematics there is a bulk node which you need to put it in your layout as well...because if you do have a bulk nodes in schematic but not drawn in layout you will get an LVS error...which said missing nets...

you could add as more contacts as you can based on the free space in your layout providing that you didn't violate design rules.

 

[tony_wu_ad]

Thank you for everyone.
I download the file and study it
Thank you