Help wanted - PSpice simulation from Allegro HDL schematic

[phoenixosu]

I am trying to simulate a schematic in Allegro design entry HDL 16.3 using the built in PSpice, drop down menu called "AMS Simulator".

My schematic is just a dummy with only 2 resistors, a GND node, and a floating node (no symbols for a voltage source yet I know we have a long way to go but I just want to get the tools working).

Here is the netlist that is created, obviously the subcircuits for the two resistors are undefined!

***** Pspice Netlist (Cadence Design Systems Inc.)
***** Design : pspice_test
***** Date : AUG 16' 2011 Time : 11:57:36
****************************************************************

X_R2 0 vcc_bar resistors
X_R1 0 vcc_bar resistors



*** Subcircuit definition for empty blocks.

.subckt resistors a_OP_0_CP_ b_OP_0_CP_
.ends


Here is what I see when I draw up the same in LTSpice, this is for my reference to see where I need to get to

* C:\Documents and Settings\XXXXXXXX\Desktop\spicetest\Draft22.asc
XX1 0 vdd res_30k1
XX2 0 vdd res_30k1

* block symbol definitions
.subckt res_30k1 1 2
R1 2 1 30.1k
.ends res_30k1

.backanno
.end


In my resistor symbols I have the following attributes/values
VALUE 30.1K
PACKAGE_SIZE << NULL >>
DIE_REV << NULL >>
PACK_TYPE 0402
LOCATION R2
$SPICE_LOCATION R2
SIZE 1
VLOG_PARAM1 size integer
TOLERANCE 1%
PART_NUMBER XXX-XXXXXX
PATH i3
$SPICE_VALUE 30.1k

The object is written out like this
Object: Symbol <XXX_XXXXXXXX>RESISTORS


I assume that I need to somehow define what the subcircuit contents are by somehow supplying models and/or assigning things to the instances. I'm still somewhat new to Allegro and need some direction on where to go from here to get to a complete netlist.

P.S. I have put XXXXXs in where certain names/numbers are that I probably shouldn't post online.

 

[atripathi]

Which library you are using in your project? YOu should use analog library and place part from those. You should not face this problem after that.