# Help on substrate of p plus resistor!!!!

Status
Not open for further replies.

#### sunjiao3

##### Member level 5
Dear all, I encounted a problem.

I use the p plus resistors in process of csmc 0.6. This kind of resistor is built in the N well. Someone said that the Nwell of such resistors must be connected to VDD to give it a definite voltage.

So, is it right? And why? Could anyone of you give me some explanation on this issue? Thank you all in advance.

#### nxing

I guess it's to form a reversed connected diode and isolate the resistor from other parts of the circuits.

#### sunjiao3

##### Member level 5
So, if I don't do it. What will happen. Is is essential to connect all the Nwell to VDD? Could anyone of you please give me some detailed explanation and suggestion?

#### alvays

##### Member level 4
maybe latchup,p diffusion resistor in N-well, their pn junction forms a diode, so it must be reversed.
Anyboy else gives other explanation or more?
As the potential along the resistor is not same due to the reversed bias voltage, the voltage modulation coefficient may confuse you.

#### scottieman

##### Full Member level 2
sunjiao3 said:
Dear all, I encounted a problem.

I use the p plus resistors in process of csmc 0.6. This kind of resistor is built in the N well. Someone said that the Nwell of such resistors must be connected to VDD to give it a definite voltage.

So, is it right? And why? Could anyone of you give me some explanation on this issue? Thank you all in advance.
I would say that it is a common practice. By connecting the N-well to VDD can make sure the diode (N-well is the cathode, P+ resistor region is anode) is always reverse biased. WHY it is IMPORTANT?

If the current flow through your P+ resistor is, say 100uA. Once your diode is in reverse bias, it is okay. Once your diode is forward biased due to the floating N-well, all your 100uA will go to the N-well rather than the other terminal of your P+ resistor.

Hope it helps
Scottie

#### huojinsi

##### Full Member level 5
Connecting the N-well to VDD can make sure the diode (N-well is the cathode, P+ resistor region is anode) is always reverse biased,so eliminate parasitic diode effect.

#### vbhupendra

##### Full Member level 4
One more reason is to stop the parasitic channels (refer The Art of Analog Layout by Hastings Chapter 4)

Status
Not open for further replies.