research_vlsi
Advanced Member level 4
modelsim no mcd channels available
Hi friends while i simulating my design i come across the following warning.
# ** Warning: (vsim-3533) [FOFIW] - No mcd channels available.
Failed to open file "D:/output/v_out/design.out" for writing.
design.out is the file that will generated from my verilog code.
I used
file=$fopen("D:/output/v_out/design.out"); in the code.. but the file is not generating after simualtion...
anybody help regarding this..
Hi friends while i simulating my design i come across the following warning.
# ** Warning: (vsim-3533) [FOFIW] - No mcd channels available.
Failed to open file "D:/output/v_out/design.out" for writing.
design.out is the file that will generated from my verilog code.
I used
file=$fopen("D:/output/v_out/design.out"); in the code.. but the file is not generating after simualtion...
anybody help regarding this..