Help in FPGA/VHDL - need to create an activation signal

[jpaulobenevides]

Help in FPGA/VHDL

I need to create an activation signal for a process and i connected it to a key in a FPGA DE2 of Altera. The
problem is that right after i program FPGA, the process runs before i even turn the key on. Can anyone help me?

 

[vlsi_dst]

Re: Help in FPGA/VHDL

CHeck whether the key is active High or Active low.. and how you have initiated the signal.I think maybe you have initiated the signal in the reverse manner.

 

[oursriharsha]

Re: Help in FPGA/VHDL

Also , if you supplied the signal (enable to the process ) in the sensitivity , check for the initial conditions and also the required conditions to enable the process.