Apr 6, 2010 #1 P pankajnegi306 Newbie level 4 Joined Apr 6, 2010 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Location faridabad Activity points 1,301 hi pankaj negi here and new in VLSI , i wana some help in Tanner S-edit , i m designing of new 1bit full Adder using c,os in 250 nm , can any one tell me, can i reduce the size more than that and also the recently used size for cmos
hi pankaj negi here and new in VLSI , i wana some help in Tanner S-edit , i m designing of new 1bit full Adder using c,os in 250 nm , can any one tell me, can i reduce the size more than that and also the recently used size for cmos