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# Help in ADC to calculate INL and DNL

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#### coolstuff07

determine inl and dnl with ltspice

What is the difference between Best fit method and End point method for calculating INL and DNL.

End Point method:

The end points in the ADC transfer function are used to draw a straight line. The real ADC data is compared to the straight line. The deviation is used to calculate INL. DNL can be derived from INL.

Best fit method:

Instead of using the end points of the ADC data, a best-fit straight line is drawn. We use this best fit line to compare to the ADC output to calculate the INL. The best fit line is chosen to minimize the mean squared distance between the straight line and the ADC data points. This minimizes the INL (it minimizes SUM of INL^2 )

Search for "best-fit" to find the matlab commands:

point check dnl

eecs4ever said:
End Point method:

The end points in the ADC transfer function are used to draw a straight line. The real ADC data is compared to the straight line. The deviation is used to calculate INL. DNL can be derived from INL.

Best fit method:

Instead of using the end points of the ADC data, a best-fit straight line is drawn. We use this best fit line to compare to the ADC output to calculate the INL. The best fit line is chosen to minimize the mean squared distance between the straight line and the ADC data points. This minimizes the INL (it minimizes SUM of INL^2 )

Search for "best-fit" to find the matlab commands:

Hello,

can i the matlab codes in 'http://www.maxim-ic.com/appnotes.cfm/an_pk/2085/' directly to find the INL and DNL?

Yes, you can use the matlab code to generate the INL/DNL plot. It requires that you've tested your ADC using a sinusoid input, close to full scale, and that you've acquired many samples. There are also more details about the frequency requirements described in the link above.

check nonlinearity of ramp signal matlab

eecs4ever said:
Yes, you can use the matlab code to generate the INL/DNL plot. It requires that you've tested your ADC using a sinusoid input, close to full scale, and that you've acquired many samples. There are also more details about the frequency requirements described in the link above.

These are the part of codes i have taken.

filename=input('File Name or press ENTER for Listing Transfer HP16500C: ');
if isempty(filename)
filename = 'listing';
end
fid=fopen(filename,'r');
numpt=input('Number of Data Points? ');
mid_code=input('Enter Mid-Code (Mean):');

I have few questions regarding the codes above:

1.The 'File Name' refer to what actually?
2.What is Data Points?
3.How to find Mid-Code (Mean) actually?

Thx

at least how many do we need?

inl and dnl plot

1. The file name refers to the file where you have stored your Data points.

2. A data point refers to 1 ADC digital output. For example, if you have 4 bit ADC, this will be 4 bits in binary, or a decimal value between 0 and 15.

3. to find the mean: SUM ( value of data points) / number of data points.

"Unfortunately the histogram method requires the capture of fairly large data records. The number of samples required is depending on the resolution of the ADC, the desired confidence level of the measurement, and the size of the DNL error. For instance, a 10-bit ADC with a DNL error (β) of 0.1LSB and a 95% confidence level (Zα/2) requires more than half a million samples (NRECORD) to be recorded. Boosting the confidence level from 95% to 99% will result in a significantly higher data record size of more than one million samples.

NRECORD = π × 2N-1 × (Zα/2)²] / β² = π × 29 × (1.96)² / (0.1)² = 617,920
NRECORD = π × 2N-1 × (Zα/2)²] / β² = π × 29 × (2.58)² / (0.1)² = 1,070,678"

to calculate INL correctly, you acutally need a lot more samples. maybe 5~10x of the # required for acurrate DNL ?

https://www-mtl.mit.edu/researchgroups/hslee/0820doer.pdf

listing transfer hp16500c:

eecs4ever said:
1. The file name refers to the file where you have stored your Data points.

2. A data point refers to 1 ADC digital output. For example, if you have 4 bit ADC, this will be 4 bits in binary, or a decimal value between 0 and 15.

3. to find the mean: SUM ( value of data points) / number of data points.

"Unfortunately the histogram method requires the capture of fairly large data records. The number of samples required is depending on the resolution of the ADC, the desired confidence level of the measurement, and the size of the DNL error. For instance, a 10-bit ADC with a DNL error (β) of 0.1LSB and a 95% confidence level (Zα/2) requires more than half a million samples (NRECORD) to be recorded. Boosting the confidence level from 95% to 99% will result in a significantly higher data record size of more than one million samples.

NRECORD = π × 2N-1 × (Zα/2)²] / β² = π × 29 × (1.96)² / (0.1)² = 617,920
NRECORD = π × 2N-1 × (Zα/2)²] / β² = π × 29 × (2.58)² / (0.1)² = 1,070,678"

to calculate INL correctly, you acutally need a lot more samples. maybe 5~10x of the # required for acurrate DNL ?

https://www-mtl.mit.edu/researchgroups/hslee/0820doer.pdf

What is the format of that file which contains data points? for your infos, i'm simulating my ADC with LTSpice. The resolution of my ADC is 8 bit

how to calculate dnl of adc

The code above is meant to be used when testing your ADC chip ( real silicon). It would take far to do the histogram test in simulation.

To check the accuracy of your ADC in simulation, you can do an FFT test. Put in a sine wave. take 128 samples, then take the FFT of the data points.

Or, put in a linear ramp, ~1000 pts, and check the output your ADC to estimate the DNL.

how to calculate dnl for adc

eecs4ever said:
The code above is meant to be used when testing your ADC chip ( real silicon). It would take far to do the histogram test in simulation.

To check the accuracy of your ADC in simulation, you can do an FFT test. Put in a sine wave. take 128 samples, then take the FFT of the data points.

Or, put in a linear ramp, ~1000 pts, and check the output your ADC to estimate the DNL.

To get 128 samples should i simulate 128 times withe different frequency? I'm simulating with LTSpice. And for the linear ramp, what do you really mean with ~1000 pts? Maybe snapshot example would be very helpful here. I have never done such kind of things before. Thx you

run 1 transient simulation. To get 128 samples, you should input a sine wave, and run a transient sim. Allow the ADC to settle out the initial transients and record 128 data points and then take a FFT of the data. read this note here:

which is the best method for adc

eecs4ever said:
run 1 transient simulation. To get 128 samples, you should input a sine wave, and run a transient sim. Allow the ADC to settle out the initial transients and record 128 data points and then take a FFT of the data. read this note here:

thx a lot. u r always there to help me. Just found an article(see attachment) is that what you mean by finding DNL with a ramp signal? how about the 1000 pts?

Yes, exactly. The example you found is a simulation of a 6 bit ADC, and they took ~70 samples there.

For your 8bit ADC, I suggested more points so that you can estimate the INL/DNL more accurately.

I think the snapshot i gave you valid just for non-clocked ADC. Because my result of ADC gave strange output. When i put a ramp as input to cover the full scale, all my output showed '1'. What do you think?

scheck 162

Your 8 bit ADC should have at least 8 bit of digital output. If the output is always the same regardless of your ADC's input, then you should probably check to see if your ADC works at all. A clock signal is required.

eecs4ever said:
Your 8 bit ADC should have at least 8 bit of digital output. If the output is always the same regardless of your ADC's input, then you should probably check to see if your ADC works at all. A clock signal is required.

Hello,

I got some result( see attachment). I applied an input ramp signal and there are changes in my output.In the attchment b0...b8 correspond to bit 1...bit 8. I stopped my simulation at 0.12FS because want to have a clear view. What i don't understand is, the spikes(line 0.5 V) at the beginning and somewhere along the time axis. Do you have any ideas on this? The code 00001000 is missing because after code 00000111, it goes directly to code 00001001. Normally what is the cause of missing code?

Looks like your input is moving at roughly 1 LSB per cycle. One possible cause is that your input signal may have skipped that bin if it is moving slightly faster than 1 LSB per cycle and if that bin is slightly smaller than what it should be. Try to reduce the ramp rate of your input by 4 , and run the same simulation for 4 uS and see what happens.

If that code is still missing, it means that its your ADC's non-linearity that causing the missing code.

eecs4ever said:
Try to reduce the ramp rate of your input by 4 , and run the same simulation for 4 uS and see what happens.

I still don't understand why i should reduce the ramp rate by 4. This is because, at first i set the speed of clock at 20MHz or 20MSample/s. In order to include all the 256 digital codes, the ramp input should take (1/20MHz)×256 = 12.8 µS to reach full scale 1.4 V. My full scale input is 1.4Vpp.

i have designed 4 bit ADC i have to calculate INL/DNL using FFT analysis ....
as u told that take 128 samples and then take FFT of the data points....
plz tell me how to take FFT of Data points and how to calculate INL/DNL from FFT analysis.......
@eecs4ever

want to know how u finally calculated INL and DNL

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