GSM PA switching issue

[rhjang]

When testing ORFS due to switching under -20 degree C.
PCS switching at frequency offset +/-400KHz will drop immediately from -30 to -20 when VBAT over 4.3V(only at CH750~CH810).
And PVT has an indentation at ramp up curve.
I tried two ways
1. Add an 2.2uF or 4.7uF cap (bypass to Ground) at VBAT trace-->
switching is improved under -20 degree C VBAT 4.3V, but still drop to -20 when VBAT is 4.4V
2.
After removing 10nF(bypass to Ground) at VBAT trace the issue solved.
But I dno't know how to explain it, does anyone have any idea?

 

[Wilson_yu_chen]

Hi ,

I'm curious if you would get ORFS_S degradation on high temp (55 degree C) at
the same high VBAT ? Also ETSI didn't require us to test for VBAT > 4.2V, so ORFS_S at VBAT=4.2V is acceptable or also degrade poor then -30dBm ?

For point1: If you are using Y5V type of capacitor for bypassing, then capacitance would drop more severely when VBAT goes higher. Big bypassing capacitor would mitigate the effect of your voltage interference on VBAT or PA bias.

For Point2: 10nF capacitor using for bypassing is around 50MHz originally. it should be far away from 400KHz offset tested in ORFS_S and also PA loop bandwidth. Maybe 10nF provide a pole that bother your PA loop in some way but I don't know exactly. Could you please try to replace 10nF by 0.1uF and 1nF and see the ORFS_S performance ? If it really make some difference, then PA loop shall be
affected.

Please update your status and thank you !

wilson