Can someone help me on the following DRC error. The RVE is indicated the below error for NFET devices
GR268b: Maximum RX (not touching NW, not touching BB) N+ junct) spacing to pwell/substrate contact not over TG
( AndNot (size NW by 0.62 overunder ) outside of (NW or BB or BFMOAT or SN or RXHV or RXHV_IBM or BFCUS) for no latchup <= 53.0 um.
I am having the same problem. How did you end up fixing the error? I didn't get the reply from erikl.
I am sending a picture of my layout. It is basically 4 mim capacitors interconect 2 by 2. I added the tie down diode TDNDSX (from 180 nm IBM) and connected it to the mims by adding contacts.