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Global buffer decleration

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itmr

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HI ALL
I AM NEW ALTERA user and i need help to configure signal as global buffer.
i mean ' i generate a clock from the source board clock and i need to pass it to several componenets- so i need to use global buffer.
how can i decleared this clock as global buffer in altera design suite?
 

FvM

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The Altera synthesis tool is assigning gloabl clock networks automatically based on fan-out and timing requirements. Normally you don't have to do anything. I suggest to implement the design and review assignment of global clock networks in the compilation report.
 
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itmr

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yes u guess you right but i geting an error shen i try to connect the genereted clock to several units by temporary signal...
mybe this is my problem? how should i connect the generaetd clock to other units?
 

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Please report the error. I presume, that you know about the difference between error an warning. An eror in behavioral code is most likely a HDL syntax error. If you are however connecting vendor specific IP to a generated clock, you may be doing something not supported by a specfic device family.
 
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itmr

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sorry it was my mistake - i declered one of the port as output - i mean i connect output to output

now it works well

thank u all and sorry for distrubing u guy"S
 

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