Well...I could not understand the above explanation. How is Vcm=1.25 v even getting generated with the help of resistors? Pls. elaborate on the answer. Other than that, can anyone refer to me a simpls LVDS driver and receiver ckt. pls?
Thanks,
Arvind Gupta
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I forgot to add this in my previous post: It is mentioned in the paper that Iout or the bias current for the bridge is fixed at Vod(nominal)/50. I suppose Vod(nominal) would be 0.35v. Then Iout comes to 0.35/50=7 mA. The specifications of LVDS says that Iout should be 3.5mA. So how come this mismatch?
Thanks and Regards,
Arvind Gupta.