generating clk signal

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sameena

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sir,
iam generating 100mhz signal in xilinx in verilog using dcm ,,,,plz help me in writing code
 

Sure. Download the datasheet for the fpga you are using. Specifically read the chapter on "clocking resources". That gives you plenty of information, and will get you well underway to including a DCM in your design. Good luck!

PS: if that is too much work for you, then fire up coregen from ISE and click through the clocking wizard.

PPS: if that is too much work, google for some source code.

PPPS: if that is too much work, pursue a career in management or something.
 

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